1. Field of the Invention
This invention relates to a structure of an antenna effect monitor, and more particularly to a structure of an antenna effect monitor that can monitor the antenna effect when antenna ratio is smaller than 1000, in which the antenna effect induced by a bonding pad in the structure is also effectively avoided.
2. Description of Related Art
Antenna effect is a typical problem that occurs in semiconductor fabrication and causes instability of devices when plasma process is involved. During the plasma process in fabrication, the surface of a semiconductor substrate is bombarded by plasma ions and a large number of charged particles, such as electrons, are therefore created. These charged particles choose the route of lowest resistance to drift away through, for example, conductive layers and are accumulated by the device elements. These accumulated charges are also called static charges. As the accumulated charges exceed a certain level in the device elements, the device's electric properties may be shifted or the device may even be damaged. This phenomenon is called the antenna effect.
In general, the strength of antenna effect is proportional to an antenna ratio of area (A.sub.A) or an antenna ratio of perimeter (a.sub.P). A larger quantity of A.sub.A or A.sub.P induces a larger antenna effect. The A.sub.A and A.sub.P are defined in by the following: EQU A.sub.A =M.sub.A /G.sub.A,
where M.sub.A is the area of an interconnect metal layer, and G.sub.A is the area of a gate; EQU A.sub.P =M.sub.P /G.sub.P,
where M.sub.P is the perimeter of an interconnect metal layer, and G.sub.P is the perimeter of a gate.
According to the above formulas, if the area of the interconnect metal layer M.sub.A or the perimeter of the interconnect metal layer M.sub.P is reduced, then the antenna effect is reduced. The antenna effect is still reduced even if G.sub.A or G.sub.P is enlarged.
For semiconductor fabrication at a deep-submicron level or less, because the device integration is increased, it is difficult to detect the antenna effect between a multi-level interconnect metal layer and a polysilicon gate. The blind antenna effect causes a potential problem of device reliability. It becomes important to effectively monitor the antenna effect and avoid the antenna effect induced by the monitor structure itself.
In a conventional fabrication procedure, several different structures are used to monitor antenna effect and detect the damage of devices during a plasma process. The monitoring structure usually includes a long channel length structure, a dummy polysilicon layer with short channel length, or a small metal bonding pad with short channel length.
FIG. 1 is a cross-sectional view schematically illustrating a conventional structure for monitoring antenna effect. In FIG. 1, a transistor T1, such as a metal-oxide semiconductor (MOS) transistor, is formed on a semiconductor substrate 10. The transistor T1 includes a gate 11, which is electrically coupled to a monitoring unit of antenna effect 13 through a doped polysilicon layer 12 and a contact plug 14. A metal bonding pad 15 is also electrically coupled to the doped polysilicon layer 12 through a contact plug 16. A passivation layer 17 covers the substrate 10 but includes a pad window 18 exposing the metal bonding pad 15. Several internal structure, such as a multilevel interconnect metal layer or an inter-metal dielectric layer, related to the device design are not shown but conventionally exist.
The measurable antenna ratio for the metal bonding pad 15 to the gate 11 of the transistor T1 is about 1000-3000. If the antenna ratio is less than 1000, the antenna effect is not measurable but a blind exists to potentially affect the device reliability. Moreover, a protection diode (not shown) is usually coupled to the metal bonding pad 15 to avoid the antenna effect induced by the metal bonding pad 15 itself. Thus, the antenna damage induced by the metal bonding pad 15 on the transistor T1 may be reduced. However the protection diode cannot effectively prevent a plasma damage from occurring on the transistor T1.